top of page

PAPER SUBMISSION

​

Manuscript guidelines as well as instructions on how to submit electronically are available HERE.

​

Papers must not exceed four A4 pages with all illustrations and references included.
All submissions must be received by 10 April, 2017
. (NEW DEADLINE: 18 APRIL) 


Papers submitted for review must clearly state:

• The purpose of the work
• How and to what extent it advances the state-of-the-art
• Specific results and their impact


Only work that has not been previously published or submitted elsewhere will be considered.
Submission of a paper for review and subsequent acceptance is considered as a commitment that the work will not be publicly available prior to the conference.
After selection of papers, the authors will be informed about the decision of the Technical Program Committee by e-mail by June 2, 2017.
At the same time, the complete program will be published on this website.
An oral presentation will be given at the Conference for each accepted paper. No-shows will result in the exclusion of the papers from the Conference Proceedings and the IEEE Xplore Digital Library.
For each paper independently, at least one co-author is required to register for the Conference (one registration-one paper policy).
Registration fees and deadlines will be soon available.

​

​

​

CONFERENCE TOPICS - ESSDERC

​

  • Advanced CMOS: Process and Device Technology, Characterization and Reliability
    CMOS scaling, Novel MOS device architectures; Circuit/device interaction and co-optimization; High-mobility channel devices; CMOS front-end or back-end processes; Interconnects; Integration of RF or photonic devices; 3D integration. Front-end and back-end manufacturing processes; 3D integration and wafer-level packaging; Reliability of materials, processes and devices; Advanced interconnects; ESD, latch-up, soft errors, noise and mismatch behavior, hot carrier effects, bias temperature instabilities, and EMI; Defect monitoring and control; Metrology; Test structures and methodologies; Manufacturing yield modeling, analysis and testing.
     

  • Opto-, Power and Microwave Devices
    New device or process architectures; New phenomena and performance improvement of optoelectronic, high voltage, smart power, IGBT, microwave devices; Passive devices, antennas and filters (including Si, Ge, SiC, GaN); Optoelectronic devices including sensors, LEDs, semiconductor lasers; Photovoltaic devices; Studies of high temperature operation; IC cooling and packaging aspects.
     

  • Fundamental Physical Modeling of Materials and Devices
    Numerical, analytical and statistical modeling and simulation of electronic, optical or hybrid devices, the interconnect, isolation and 2D or 3D integration; Aspects of materials, fabrication processes and devices e.g. advanced physical phenomena (quantum mechanical and non-stationary transport phenomena, ballistic transport, …); Mechanical or electro-thermal modeling and simulation; DfM.
     

  • Device and Circuit Compact Modeling
    Compact/SPICE modeling of electronic, optical, organic, and hybrid devices and their IC implementation and interconnection. Topics include compact/SPICE models and its Verilog-A standardization of the semiconductor devices (including Bio/Med sensors, MEMS, Microwave, RF, High voltage and Power), parameter extraction, compact models for emerging technologies and novel devices, performance evaluation, reliability, variability, and open source benchmarking/implementation methodologies. Modeling of interactions between process, device, and circuit design as well as Foundry/Fabless Interface Strategies.
     

  • Advanced and Emerging Memories
    Embedded and stand-alone memories; DRAM, FeRAM, MRAM, ReRAM, PCRAM, Flash, Nanocrystal and single/few-electron memories, Organic memories, NEMS-based devices, Selectors; Novel memory cell concepts and architectures, covering device physics, reliability, process integration and manufacturability issues and including 3D NAND Flash, crosspoint arrays, and 3D systems integration; Devices and concepts for neuromorphic computing, memory-enabled logic and security applications.
     

  • MEMS, NEMS, Bio-sensors and Display Technologies
    Design, fabrication, modeling, reliability, packaging and smart systems integration of actuators (discrete SoC, SiP, or heterogenous 3D integration); MEMS, NEMS, optical, chemical or biological sensors; Display technologies; High-speed imagers; TFTs; Organic and flexible substrate electronics.
     

  • Emerging non-CMOS Devices and Technologies
    Novel non-CMOS materials, processes and devices, (nanotubes, nanowires and nanoparticles, including carbon, graphene, metal oxides, …) for electronic, optoelectronic, sensor & actuator applications; Molecular and quantum devices; Nanophotonics, plasmonics, spintronics, self-assembling methods; Energy harvesters; High frequency digital and analog devices including THz; New high-mobility channels (strained Si, Ge, SiGe).

​

​

Call for Paper

ESSDERC

Financial Sponsor

bottom of page