Event

Tutorial

 

​When

13:30-15:30 

 

Where

Auditorium III

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Abstract

First, there were discrete-time filters and delta-sigma ADCs, and then came continuous-time filters and delta-sigma ADCs. In spite of all the initial pessimism, CTDSMs are in large-scale use. The art of the discrete-time pipeline ADC, which has been the workhorse of high-speed conversion, has been perfected over the last 35 years. In spite of all the progress, fundamental problems remain – the difficulty in driving them, high-gain amplifiers, and the necessity for an anti-alias filter. The continuous-time pipeline is an ADC architecture that combines anti-alias filtering and data-conversion. It is easy to drive, and achieves this in a way that can be proven to be more power- and area- efficient than an anti-alias filter followed by a discrete-time pipeline ADC. This tutorial describes this intriguing converter architecture, compares it with competing techniques, and its prospects and challenges.

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Organiser

Shanthi Pavan (Indian Institute of Technology Madras, IN)

Shanthi Pavan is the NT Alexander Chair Professor of Electrical Engineering at the Indian Institute of Technology, Madras. He is the co-author "Understanding Delta-Sigma Modulators (second edition)" which received the Outstanding Professional Book Award from IEEE Press in 2020. Shanthi has received numerous awards for his work, including the Outstanding Forum Presenter at ISSCC 2021. He serves on the Technical Program Committee (TPC) of ISSCC and on the editorial boards of the IEEE Journal of Solid-State Circuits and Solid-State Circuits Letters. He is a fellow of the IEEE.

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